M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 155

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Figure 12.35 Usage Example of Position-data-retain Function (U phase )
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6
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12.3.1 Position-Data-Retain Function
C
0
2
9
This function is used to retain the position data synchronously with the three-phase waveform
output.There are three position-data input pins for U, V, and W phases.
A trigger to retain the position data (hereafter, this trigger is referred to as "retain trigger") can be selected
by the PDRT bit in the PDRF register. This bit selects the retain trigger to be the falling edge of each
positive phase, or the rising edge of each positive phase.
2 /
0 .
B
12.3.1.1 Operation of the Position-data-retain Function
8
0
0
U-phase waveform output
U-phase waveform output
0
Figure 12.35 shows a usage example of the position-data-retain function (U phase) when the retain
trigger is selected as the falling edge of the positive signal.
G
4
(1) At the falling edge of the U-phase waveform ouput, the state at pin IDU is transferred to the PDRU
(2) Until the next falling edge of the Uphase waveform output,the above value is retained.
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7
a
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0 -
. n
u
bit in the PDRF register.
2
p
3
0
, 1
0
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2
Carrier wave
1
0
PDRU bit
0
6
7
C
Pin IDU
2 /
, 8
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1
6
C
2 /
f o
Transferred
8
3
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8
5
Note:
Note: The retain trigger is the falling edge of the positive signal.
1
Transferred
2
Transferred
Transferred
12. Timer