M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 296

IC M16C/28 MCU FLASH 96K 80LQFP

M30280FAHP#U5B

Manufacturer Part Number
M30280FAHP#U5B
Description
IC M16C/28 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheets

Specifications of M30280FAHP#U5B

Core Size
16-Bit
Program Memory Size
96KB (96K x 8)
Core Processor
M16C/60
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Controller Family/series
M16C
No. Of I/o's
71
Ram Memory Size
8KB
Cpu Speed
20MHz
No. Of Timers
10
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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R
R
M
16.10 START Condition Duplicate Protect Function
16.11 STOP Condition Generation Method
e
E
1
. v
Figure 16.15 The duration of the start condition duplicate protect function
J
6
0
A START condition is generated when verifying that the BB flag in the S10 register does not use buses.
However, if the BB flag is set to "1" (bus busy) by the START condition which other master device gener-
ates immediately after the BB flag is verified, the START condition is suspended by the START condition
duplicate protect function. When the START condition duplicate protect function starts, it operates as fol-
lows:
The START condition duplicate protect function is valid between the SDA falling edge of the START condi-
tion and the receive completion of the slave address. Figure 16.15 shows the duration of the START
condition duplicate protect function.
When the ES0 bit in the S1D0 register is set to “1” (I
the S10 register are set to “1” at the same time, set the BB flag, PIN bit and 4 low-order bits in the S10
register to "0" simultaneously, to enter STOP condition standby mode. When dummy data is written to the
S00 register next, the STOP condition is generated. The STOP condition generation timing varies between
standard clock mode and high-speed clock mode. See Figure 16.17 and Table 16.8.
Until the BB flag in the S10 register becomes "0" (bus free) after an instruction to generate the STOP
condition is executed, do not write data to the S10 and S00 registers. Otherwise, the STOP condition
waveform may not be generated correctly.
If an input signal level of the S
is executed, a signal level of the S
outputs an "L" signal to S
In that case, the MCU can stop an "L" signal output to the S
0 to the ES0 bit in the S1D0 register (disabled), or writing 1 to the IHR bit in the S1D0 register (reset
release).
C
2
9
0 .
B
2 /
•Disable the start condition standby setting
•Writing to the S00 register is disabled. (The START condition trigger generation is disabled)
•If the START condition generation is interrupted, the AL flag in the S10 register becomes "1".(arbitration
BB flag
If the function has already been set, first exit START condition standby mode and then set the MST and
TRX bits in the S10 register to "0".
lost detection)
0
0
8
S
S
0
CL
DA
4
J
G
7
a
o r
0 -
. n
u
2
3
0
p
, 1
0
(
M
2
0
1
0
6
7
C
2 /
page 274
, 8
M
1 bit
CL
1
6
1 clock
pin.
C
f o
2 /
CL
8
3
pin is set to low ("L") after the instruction to generate the STOP condition
) B
8
CL
5
pin becomes high ("H"), and the BB flag is set to 0 (bus free), the MCU
The duration of start condition duplicate protect
2 bit
2 clock
2
C bus interface enabled) and the MST and TRX bits in
CL
3 bit
3 clock
pin by generating the STOP condition, writing
16. MULTI-MASTER I
8 bit
8 clock
ACK bit
2
C bus INTERFACE
ACK clock

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