M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 55

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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5.2 Software Reset
5.3 Watchdog Timer Reset
5.4 Oscillation Stop Detection Reset
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Figure 5.1 Example Reset Circuit
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When the PM03 bit in the PM0 register is set to “1” (microcomputer reset), the microcomputer has its pins,
CPU, and SFR initialized. Then the program is executed starting from the address indicated by the reset
vector. The device will reset using internal on-chip oscillator as the CPU clock.
At software reset, some SFR’s are not initialized. Refer to 4. Special Function Register (SFR).
When the PM12 bit in the PM1 register is “1” (reset when watchdog timer underflows), the microcomputer
initializes its pins, CPU and SFR if the watchdog timer underflows. The device will reset using internal on-
chip oscillator as the CPU clock. Then the program is executed starting from the address indicated by the
reset vector.
At watchdog timer reset, some SFR’s are not initialized. Refer to 4. Special Function Register (SFR).
When the CM20 bit in the CM2 register is set to “1” (oscillation stop, re-oscillation detection function en-
abled) and the CM27 bit in the CM2 register is “0” (reset at oscillation stop detection), the microcomputer
initializes its pins, CPU and SFR, coming to a halt if it detects main clock oscillation circuit stop. Refer to the
section 7.8 oscillation stop, re-oscillation detection function.
At oscillation stop detection reset, some SFR’s are not initialized. Refer to the section 4. Special Function
Register (SFR).
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page 33
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RESET
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Recommended
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Equal to or less
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More than td(ROC) + td(P-R)
Equal to or less
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CC
5. Reset