M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 318

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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18. Flash Memory Version
18.1 Flash Memory Performance
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NOTES:
Table 18.1 Flash Memory Version Specifications
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6
Flash memory operating mode
Erase block
Program method
Erase method
Program, erase control method
Protect method
Number of commands
Program/Erase
Endurance
Data Retentio
ROM code protection
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In the flash memory version, rewrite operation to the flash memory can be performed in three modes : CPU
rewrite mode, standard serial I/O mode and parallel I/O mode.
Table 18.1 lists specifications of the flash memory version. (Refer to Table 1.1 or Table 1.2 for the items
not listed in Table 18.1.
0
C
1. Program and erase endurance is defined as number of program-erase cycles per block. If program and erase
2. To reduce the number of program and erase endurance when working with systems requiring numerous rewrites,
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0 .
B
endurance is n cycle (n=100, 1000, 10000), each block can be erased and programmed n cycles. For example, if a
2-Kbyte block A is erased after programming one-word data to each address 1,024 times, this counts as one
program and erase endurance. Data cannot be programmed to the same address more than once without erasing
the block. (rewrite prohibited).
write to unused word addresses within the block instead of rewrite. Erase block only after all possible addresses are
used. For example, an 8-word program can be written 128 times maximum before erase becomes necessary.
Maintaining an equal number of times erasure between block A and block B will also improve efficiency. It is
recommended to track the total number of erasure performed per block and to limit the number of erasure.
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Block 0 to 5 (program space)
Block A and B (data space)
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(2)
3 modes (CPU rewrite, standard serial I/O, parallel I/O)
In units of word
Block erase
Program and erase controlled by software command
Block 0 to block 5 are write protected by FMR16 bit.
In addition, the block 0 and block 1 are write protected by bit FMR02
5 commands
100 times, 1,000 times (See Tables 1.5 and 1.6 Product Code)
100 times, 10,000 times (See Tables 1.5 and 1.6 Product Code)
20 years (Topr = 55 C)
Parallel I/O and standard serial I/O modes are supported
See Figures 18.1 to18.4 Flash Memory Block Diagram
Specification
18. Flash Memory Version