M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 330

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M
R
R
1
e
E
Figure 18.7 FMR0 and FMR1 Registers
. v
6
J
0
C
2
9
2 /
0 .
B
8
0
0
0
G
4
J
7
a
o r
0 -
. n
u
2
p
3
NOTES:
0
NOTES:
, 1
Flash Memory Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
0
Flash Memory Control Register 1
1. To set the FMR11 bit to “1”, write "1" to this bit immediately after writing "0" while the FMR01 bit is set to
2. To set the FMR16 bit to “1”, write "1" to this bit immediately after writing "0" while the FMR01 bit is set to
3. When rewriting more than 100 times, set this bit to “1” (with wait state). When the FMR17 bit is set to
b7 b6 b5 b4 b3 b2 b1 b0
(
M
1. To set the FMR01 bit to “1”, write “1” to this bit immdediately after writing “0”. Do not generate an
2. To set the FMR02 bit to “1”, write "1" to this bit immediately after writing "0" while the FMR01 bit is set
3. Set this bit in a space other than the flash memory by program. When this bit is set to "1", access to
4. This bit is set to “0” by executing the clear status command.
5. This bit is enabled when the FMR01 bit is set to “1” (CPU rewrite mode). If the FMR01 bit is set to 0",
"1". Do not generate an interrupt or a DMA transfer between setting the bit to “0” and setting it to “1”.Set this
bit while the P8
FMR01 bit and FMR11 bit are both set to “0”.
“1”. Do not generate an interrupt or a DMA transfer between setting the bit to “0” and setting it to “1”.
“1”(with wait state), regardless of the PM17 bit setting, 1 wait state is inserted when accessing to blocks A
and B. The PM17 bit setting is enabled, regardless of the FMR17 bit setting, as to the access to other block
and the internal RAM.
2
0
1
interrupt or a DMA transfer between setting the bit to “0” and setting it to “1”. Set this bit while the
P8
flash memory in EW mode 0. Set this bit to read alley mode and “0”
to “1”. Do not generate an interrupt or a DMA transfer between setting this bit to “0” and setting it to “1”.
flash memory will be denied. To set this bit to "0" after setting it to "1", wait for 10 usec. or more after
setting it to "1". To read data from flash memory after setting this bit to "0", maintain tps wait time
before accessing flash memory.
this bit can be set to “1” by writing "1" to the FMR01 bit. However, the flash memory does not enter
low-power consumption status and it is not initialized.
0
6
0
0
5
7
C
/NMI/SD pin is held “H” when selecting the NMI function. Set by program in a space other than the
0
2 /
page 308
, 8
M
5
1
/NMI/SD pin is held “H” when the NMI function is selected. If the FMR01 bit is set to “0”, the
6
C
2 /
f o
Bit Symbol
Bit Symbol
(b5-b4)
FMR00
FMR01
FMR02
FMSTP
FMR06
FMR07
8
3
FMR11
(b3-b2)
FMR16
FMR17
) B
8
(b4)
(b0)
(b5)
Symbol
FMR0
Symbol
FMR1
5
RY/BY status flag
CPU rewrite mode select bit
Block 0, 1 rewrite enable bit
Flash memory stop bit
Program status flag
Erase status flag
Block 0 to 5 rewrite enable
bit
EW mode 1 select bit
Reserved bit
Nothing is assigned. When write, set to “0”.
When read, its contect is indeterminate.
Reserved bit
Block A, B access wait bit
Reserved bit
Reserved bit
(2)
Bit Name
Address
01B5
Address
01B7
Bit Name
16
16
(4)
(4)
(1)
(3, 5)
(3)
(1)
(2)
After Reset
00000001
After Reset
000XXX0X
Set write protection for user ROM area
(see Table 18.4)
When read, its content is indeterminate
0: Busy (during writing or erasing)
1: Ready
0: Disables CPU rewrite mode
1: Enables CPU rewrite mode
Set to “0”
0: Successfully completed
1: Completion error
0: Successfully completed
1: Completion error
When read, its content is indeterminate
0: Starts flash memory operation
1: Stops flash memory operation
(Enters low-power consumption state
and flash memory reset)
0: EW mode 0
1: EW mode 1
Set to “0”
Set write protection for user ROM
space(see Table 18.4)
0: Disable
1: Enable
0: PM17 enabled
1: With wait state (1 wait)
(Disables software command)
(Enables software commands)
2
2
Function
Function
18. Flash Memory Version
RW
RW
RW
RW
RW
RO
RO
RW
RO
RW
RO
RO
RW
RW
RW