M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 176

IC M16C/28 MCU FLASH 96K 80LQFP

M30280FAHP#U5B

Manufacturer Part Number
M30280FAHP#U5B
Description
IC M16C/28 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheets

Specifications of M30280FAHP#U5B

Core Size
16-Bit
Program Memory Size
96KB (96K x 8)
Core Processor
M16C/60
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Controller Family/series
M16C
No. Of I/o's
71
Ram Memory Size
8KB
Cpu Speed
20MHz
No. Of Timers
10
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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M
R
R
1
e
E
. v
6
J
Figure 13.20 Time Measurement Function (2)
0
C
2
9
2 /
0 .
B
f
8
0
0
1
0
or f
(a)
(c) Trigger signal when using digital filter
G
(b)
G1TMj register
4
J
7
a
o r
2
0 -
. n
When selecting both edges as a timer measurement trigger
or f
When selecting the rising edge as a timer measurement trigger
(The CTS1 to CTS0 bits in the G1TMCR register (j=0 to 7)=01
f
INPC1j pin input or
trigger signal after
passing the digital
filter
G1IRj bit
(The DF1 to DF0 bits in the G1TMCR register =10
u
Base timer
G1TMj register
(The CTS1 to CTS0 bits=11
INPC1j pin
Trigger signal after
passing the digital
filter
f
Base timer
INPC1j pin input or
trigger signal after
passing the digital
filter
G1IRj bit
BT1
2
BT1
p
3
BT1
0
, 1
0
(
M
NOTES:
NOTES :
(1)
NOTES :
2
1
0
1. Bits in the G1IR register.
2. No interrupt is generated if the microcomputer receives a trigger signal when the G1IRj bit is set to "1".
1. Bits in the G1IR register.
2. Input pulse applied to the INPC1j pin requires 1.5 f
(1)
1. f
(1)
0
6
(2)
However, the value of the G1TMj register is updated.
7
C
BT1
2 /
when the DF1 to DF0 bits are set to "10
page 154
, 8
M
1
n-2
n-2
6
C
2 /
f o
n-1
n-1
8
3
) B
8
5
n
n
Delayed by 1 clock
Signals, which do not match 3
times, are stripped off
2
n+1
n+1
)
n
n+2
n+2
n
n+3
n+3
n+2
2
", and f
n+4
n+4
(2)
BT1
n+5
n+5
1
or f
clock cycles or more.
n+6
n+6
2
n +5
when set to "11
n+5
2
or 11
n+7
n+7
.
.
n+8
n+8
2
)
The trigger signal is delayed
by the digital filter
n+9 n+10 n+11 n+12 n+13 n+14
n+9 n+10 n+11 n+12 n+13 n+14
2
".
2
)
write "0" by program if setting to "0"
n+8
n+8
Maximum 3.5 f
clock cycles
n+12
write "0" by program
if setting to "0"
(1)
1
or f
2
or f
BT1
13. Timer S

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