M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 387
M30280FAHP#U5B
Manufacturer Part Number
M30280FAHP#U5B
Description
IC M16C/28 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Specifications of M30280FAHP#U5B
Core Size
16-Bit
Program Memory Size
96KB (96K x 8)
Core Processor
M16C/60
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Controller Family/series
M16C
No. Of I/o's
71
Ram Memory Size
8KB
Cpu Speed
20MHz
No. Of Timers
10
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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M
R
R
20.7 Timer S
e
E
1
. v
Figure 20.4 IC/OC Interrupt i Flow Chart
J
6
0
20.7.1 Rewrite the G1IR Register
C
2
9
2 /
Bits in the G1IR register are not automatically set to 0 (no interrupt requested) even if a requested inter-
rupt is acknowledged. Set each bit to 0 by program after the interrupt requests are verified.
The IC/OC interrupt is generated when any bit in the G1IR register is set to 1 (interrupt requested) after all
the bits are set to 0. If conditions to generate an interrupt are met when the G1IR register holds the value
other than 00
request again, clear the G1IR register to 00
register to 0.
Figure 20.4 shows an example of IC/OC interrupt i processing.
0 .
B
0
0
8
0
Subject instructions: AND, BCL
G
4
J
7
a
NOTES:
o r
0 -
. n
u
1. Example for the interrupt operation when using the channel i waveform generating interrupt and
2
3
p
0
channel j time measurement interrupt.
, 1
0
(
M
2
0
1
16
0
6
, the IC/OC interrupt request will not be generated. In order to enable an IC/OC interrupt
7
C
2 /
page 365
, 8
M
1
6
Process channel j time measurement interrupt
C
Process channel i waveform generating interrupt
2 /
f o
8
3
) B
8
5
Set the G1IRj bit to "0"
Set the G1IRi bit to "0"
Interrupt completed
G1IRi=1 ?
G1IRj=1 ?
Interrupt
G1IR=0 ?
16
. Use the following instructions to set each bit in the G1IR
Yes
Yes
Yes
(1)
No
No
No
20. Precautions
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