M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 421

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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• 7.4 PLL Clock Description regarding use of M16C/28B partially added
• Table 7.2 Example for Setting PLL Clock Frequencies Description regarding
• 7.6.1 Normal Operation Mode Description is partially modified
• Figure 7.12 State Transition in Normal Mode note mark added
Protection
• LPCC1 register added to the registers protected by PRC0 bit
• Description of Protection modified
• Figure 8.1 PRCR Register LPCC1 register added, note 1 modified
Interrupts
• Table 9.6 PC Value Saved in Stack Area When an Address Match Interrupt
Watchdog Timer
• Figure 10.1 Watchdog Timer Block Diagram partially modified
• Figure 10.2 WDC Register and WDTS Register partially modified
• 10.1 Count Source Protective Mode partially modified
Timer
• 12.2 Timer B Description regarding A/D trigger mode partially modified
• Figure 12.15 Timer B Block Diagram A/D trigger mode added
• 12.2.4 A/D Trigger Mode Description partially modified
• Table 12.9 Specification in A/D Trigger Mode Description regarding count
• Figure 12.24 TB2SC Register in A/D Trigger Mode Note 4 partially modified
• Figure 12.25 Three-phase Motor Control Timer Functions Block Diagram
• Figure 12.30 TB2SC Register Note 4 modified
• Figure 12.33 Triangular Wave Modulation Operation Description modified
• Figure 12.34 Sawtooth Wave Modulation Operation Description modified
Timer S
• Figure 13.2 G1BT Register Description patially modified
• Table 13.15 Base Timer Reset Operation by Base Timer Reset Register
• Figure 13.21 Prescaler Function and Gate Function Note 1 modified, condi-
• Figure 13.22 Single-phase Waveform Output Mode Register name partially
• Table 13.10 SR Waveform Output Mode Specifications Specification modified
• Figure 13.24 Set/Reset Waveform Output Mode Description for (1) Free-run-
use of M16C/28B partially added
Request is Accepted modified, note added
start condition partially modified
Source clock partially modified
Base timer overflow request added, Note 1 added
tion modified
modified
ning operation modified, register names modified
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
C-14
Description
Summary