M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 266

IC M16C/28 MCU FLASH 96K 80LQFP

M30280FAHP#U5B

Manufacturer Part Number
M30280FAHP#U5B
Description
IC M16C/28 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheets

Specifications of M30280FAHP#U5B

Core Size
16-Bit
Program Memory Size
96KB (96K x 8)
Core Processor
M16C/60
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Controller Family/series
M16C
No. Of I/o's
71
Ram Memory Size
8KB
Cpu Speed
20MHz
No. Of Timers
10
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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M
R
R
e
E
1
. v
Figure 15.25 Each Flag Operation in ADSTAT0 Register Associated with the Operation Example
J
6
0
C
2
9
0 .
2 /
B
0
0
8
0
4
G
J
7
a
o r
0 -
. n
u
2
3
p
0
, 1
0
(
in Delayed Trigger Mode 1 (1)
M
2
• E x a m p l e w h e n s e l e c t i n g A N
0
1
• E x a m p l e 1 : W h e n A D
0
6
A D S T f l a g
A D E R R 0 f l a g
A D E R R 1 f l a g
A D T C S F f l a g
A D S T T 0 f l a g
A D S T T 1 f l a g
A D S T R T 0 f l a g
A D S T R T 1 f l a g
I R b i t i n t h e A D I C
r e g i s t e r
7
A D S T f l a g
A D E R R 0 f l a g
A D E R R 1 f l a g
A D T C S F f l a g
A D S T T 0 f l a g
A D S T T 1 f l a g
A D S T R T 0 f l a g
A D S T R T 1 f l a g
I R b i t i n t h e A D I C
r e g i s t e r
C
•Example 2: When AD
2 /
AD
A D S T f l a g : B i t 6 i n t h e A D C O N 0 r e g i s t e r
A D E R R 0 , A D E R R 1 , A D T C S F , A D S T T 0 , A D S T T 1 , A D S T R T 0 a n d A D S T R T 1 f l a g : b i t s 0 , 1 , 3 , 4 , 5 , 6 a n d 7 i n t h e A D S T A T 0 r e g i s t e r
A D
page 244
, 8
TRG
T R G
M
pin input
p i n i n p u t
1
6
C
A N
A N
A N
A N
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
"1"
"0"
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
AN
AN
AN
AN
f o
2 /
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
" 1 "
" 0 "
0
1
2
3
T R G
8
0
1
2
3
3
) B
TRG
8
p i n f a l l i n g e d g e i s g e n e r a t e d d u r i n g A N
5
pin falling edge is generated again after AN
Set to "0" by interrupt request acknow edgement or a program
0
t o A N
Do not set to "1" by program
Do not set to "1" by program
3
t o A / D s w e e p p i n s ( S C A N 1 t o S C A N 0 = " 0 1
S e t t o " 0 " b y i n t e r r u p t r e q u e s t a c k n o w e d g m e n t o r a p r o g r a m
Set to "0" by program
0
p i n c o n v e r s i o n
S e t t o " 0 " b y p r o g r a m
0
pin conversion
2
")
A/D pin input
voltage sampling
A / D p i n c o n v e r s i o n
15. A/D Converter

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