M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 56

IC M16C/28 MCU FLASH 96K 80LQFP

M30280FAHP#U5B

Manufacturer Part Number
M30280FAHP#U5B
Description
IC M16C/28 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheets

Specifications of M30280FAHP#U5B

Core Size
16-Bit
Program Memory Size
96KB (96K x 8)
Core Processor
M16C/60
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Controller Family/series
M16C
No. Of I/o's
71
Ram Memory Size
8KB
Cpu Speed
20MHz
No. Of Timers
10
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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R
R
M
e
E
1
. v
Figure 5.2 Reset Sequence
Table 5.1 Pin Status When RESET Pin Level is “L”
Figure 5.3 CPU Register Status After Reset
J
6
0
C
2
9
CPU clock
0 .
2 /
B
ROC
RESET
Address
V
0
0
8
CC
P0 to P3,
P6 to P10
Pin name
0
4
G
J
7
a
o r
0 -
. n
u
2
3
0
p
, 1
0
b15
(
M
2
td(P-R)
0
1
0
6
7
C
IPL
b19
2 /
Content of addresses FFFFE
More than
, 8
td(ROC)
Input port (high impedance)
page 34
M
1
b15
b15
b15
6
____________
C
Status
f o
2 /
8
3
) B
8
b8
5
00000
CPU clock
28 cycles
b7
U
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
I
16
O
16
16
16
16
16
16
16
16
16
16
16
16
B
to FFFFC
S
FFFFC
Z
16
D
FFFFE
16
C
b0
b0
b0
b0
b0
16
Content of reset vector
Data register(R0)
Data register(R1)
Address register(A0)
Address register(A1)
Frame base register(FB)
Interrupt table register(INTB)
Data register(R2)
Data register(R3)
Program counter(PC)
User stack pointer(USP)
Interrupt stack pointer(ISP)
Static base register(SB)
Flag register(FLG)
5. Reset

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