M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 198

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M
R
R
e
E
1
Table 14.2 Registers to Be Used and Settings in Clock Synchronous Serial I/O Mode
NOTES:
. v
J
6
Register
UiTB
UiRB
UiBRG
UiMR
UiC0
UiC1
U2SMR
U2SMR2
U2SMR3
U2SMR4
UCON
0
C
2
9
2 /
0 .
1. Set the bit 4 and bit 5 in the U0C1 and U1C1 register to “0”. The U0IRS, U1IRS, U0RRM and U1RRM
2. Not all register bits are described above. Set those bits to “0” when writing to the registers in clock
3. Set the bit 6 and bit 7 in the U0C1 and U1C1 register to "0".
4. Set the bit 7 in the U0MR and U1MR register to "0".
i=0 to 2
B
0
8
0
(3)
(3)
0
bits are in the UCON register.
synchronous serial I/O mode.
(3)
G
4
J
7
a
o r
0 -
. n
u
2
3
p
0
0 to 7
0 to 7
OER
0 to 7
SMD2 to SMD0
CKDIR
IOPOL(i=2)
CLK1 to CLK0
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS
U2RRM
U2LCH
U2ERE
0 to 7
0 to 7
0 to 2
NODC
4 to 7
0 to 7
U0IRS, U1IRS
U0RRM, U1RRM
CLKMD0
CLKMD1
RCSP
7
, 1
0
(
M
2
0
1
Bit
0
6
7
C
(1)
(3)
(3)
(1)
2 /
page 176
, 8
(4)
M
1
6
C
2 /
f o
Set transmission data
Reception data can be read
Overrun error flag
Set a transfer rate
Set to “001
Select the internal clock or external clock
Set to “0”
Select the count source for the UiBRG register
Select CTS or RTS to use
Transmit register empty flag
Enable or disable the CTS or RTS function
Select TxDi pin output mode
Select the transfer clock polarity
Select the LSB first or MSB first
Set this bit to “1” to enable transmission/reception
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Select the source of UART2 transmit interrupt
Set this bit to “1” to use UART2 continuous receive mode
Set this bit to “1” to use UART2 inverted data logic
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Select clock output mode
Set to “0”
Set to “0”
Select the source of UART0/UART1 transmit interrupt
Set this bit to “1” to use continuous receive mode
Select the transfer clock output pin when CLKMD1 is set to 1
Set this bit to “1” to output UART1 transfer clock from two pins
Set this bit to “1” to accept as input the UART0 CTS
Set to “0”
8
3
) B
8
5
_______
2
”
_______
Function
_______
_______
_________
0
signal from the P6
14.Serial I/O
4
pin