M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 408

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

0.60
1.00
Rev.
Feb., 04
Jul., 05
REVISION HISTORY
Date
All Pages New chapters added
15 - 21
Page
2, 3
4, 5
8, 9
10
14
1
6
7
New Document
Chapter, Table and Figure numbers modified
Words standardized: On-chip oscillator, A/D converter and D/A converter, EW
Description of T-ver./V-ver. are deleted
Chapter sequence modified
Overview
• 1.1 Applications “motor control” added
• Table 1.1 and 1.2 Performance Outline
• Figure 1.1 and 1.2 Block Diagram Block diagrams revised
• 1.4 Product List description partly added
• Figure 1.3 Product List (1) Normal-ver. Mask ROM, T and V versions deleted
• Figure 1.4 Product Numbering System Product code, version, ROM capacity,
• Table 1.4 Product Code (Flash Memory-ver.) - M16C/28 Group Normal-ver.
• Figure 1.4 Marking Diagram-M16C/28 Group Normal-ver. added
• Figure 1.5 Pin Assignment (Top View) of 80-pin Package and Figure 1.5 Pin
• Table 1.5 and 1.6 Pin Description Description of T/V-ver.deleted, description
Memory
• Outline modified
• Figure 3.1 Memory Map Note 2 added
SFR
• “X: Nothing is mapped to this bit” modified to “X: Indeterminate”
• “?: Value indeterminate at reset” deleted
• Register names, symbols, value after RESET of addresses 025A
• Value after reset of WDTS, WDC, SAR0, DAR0, TCR0, SAR1, DAR1, TCR1,
mode 0,1, IEBus, I
Description relating to T-ver./V-ver. are deleted, power consumption values
modified, package type is modified, Note 3 added
and memory type modified
added
Assignment (Top View) of 80-pin Package modified
of P9
leted
DM1CON, INT3IC, ICOC0IC, ICOC1IC/IICIC, BTIC/SCLDAIC, S4IC/INT5IC,
S3IC/INT4IC, BCNIC, DM0IC, DM1IC, KUPIC, ADIC, S2TIC, S2RIC, S0TIC,
S0RIC, S1TIC, SRIC, TA0IC TO TA4IC, TB1IC, TB2IC, INT0IC to INT2IC,
FMR1, FMR0, S00, G1TM0/G1PO0 to G1TM7/G1PO7, G1POCR0 to
G1POCR7, G1BT, G1BTRR, G1IR, TA11, TA21, TA41, IDB0, IDB1, DTT,
ICTB2, S3TRR, S3BRG, S4TRR, S4BRG, U2BRG, U2TB, U2RB, TA0 to TA4,,
0
to P9
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
3
, P9
5
2
to P
C bus
C-1
7
partially modified
Description
Summary
16
,0358
16
, de-