M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 272

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R
R
M
16. Multi-master I
e
E
1
. v
Note 1. V
J
Table 16.1 Multi-Master I
6
0
The multi-master I
format, equipped with arbitration lost detection and synchronous functions. Figure 16.1 shows a block
diagram of the multi-master I
tions.
The multi-master I
S3D0 register, the S4D0 register, the S10 register, the S2D0 register and other control circuits.
Figures 16.2 to 16.8 show the registers associated with the multi-master I
C
2
9
Format
Communication mode
SCL clock frequency
I/O pin
0 .
B
2 /
Item
0
0
8
0
4
J
G
7
a
o r
0 -
. n
IIC
u
2
3
=I
0
p
, 1
0
2
(
C system clock
M
2
0
1
0
6
7
C
2
2
C bus interface is a serial communication circuit based on Philips I
C bus interface consists of the S0D0 register, the S00 register, the S20 register, the
2 /
page 250
, 8
M
2
1
C bus Interface Functions
6
C
2
C bus interface and Table 16.1 lists the multi-master I
f o
2
2 /
C bus Interface
8
3
) B
8
5
Based on Philips I
Based on Philips I
16.1kHz to 400kHz (at V
Serial data line
Serial clock line
7-bit addressing format
High-speed clock mode
Standard clock mode
Master transmit
Master receive
Slave transmit
Slave receive
2
2
SDA
SDL
C bus standard:
C bus standard:
Function
MM
MM
IIC (1)
(SCL)
(SDA)
16. MULTI-MASTER I
= 4MHz)
2
C bus.
2
C bus interface func-
2
C bus data transfer
2
C bus INTERFACE