M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 414

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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• 16.5.8 Bit 7: Communication mode select bit (master/slave select bit: MST)
• 16.6.5 Bits 6, 7: I2C System Clock Select Bits ICK0, ICK1 modified
• Figure 16.20 Address data communication format moved
• (3) Limitation of CPU Clock, 16.14 Precautions modified
Programmable I/O Ports
• Note added
• 17.6 Digital Debounce Function Filter width formula modified
• Figure 17.12 NDDR and P17DDR Register Functions modified, P17DDR reg-
• Figure 17.13 Functioning of Digital Debounce Filter Title added, procedure
• Table 17.1 Unassigned Pin Handling in Single-chip Mode Note 5 added
• Figure 17.14 Unassigned Pin Handling Note modified
Flash Memory
• 18.1 Flash Memory Performance modified
• Table 18.1 Flash Memory Version Specifications modified, note modified
• 18.2 Memory Map modified
• 18.4 CPU Rewrite Mode modified
• 18.5.1 Flash Memory Control Register 0 (FMR0) FMSTP Bit modified
• 18.5.2 Flash Memory Control Register 1 (FMR1) FMR17 Bit modified
• Figure 18.6 FMR0 and FMR1 Registers FMR0 register: note 3 modified, value
• 18.6.3 Interrupts EW1 mode modified
• 18.6.9 Stop Mode modified
• 18.7.5 Block Erase modified
• Figure 18.12 Flow Chart of Block Erase Comman (when not using erase
• Table 18.7 Pin Functions (Flash Memory Standard Serial I/O Mode) P1
• Figure 18.15 Pin Connections for Serial I/O Mode (1) P1
• Figure 18.16 Pin Connections for Serial I/O Mode (2) P1
• Figure 18.17 Circuit Application in Standard Serial I/O Mode 1 P1
• Figure 18.18 Circuit Application in Standard Serial I/O Mode 2 P1
modified
ister: note 1 added
note modified
after reset modified; FMR1 register: note 3 modified, reserved bit map modified,
FMR6 modified
suspend function) Note 3 modified
added
modified
modified
added, note 1 modified
added, note 1 modified
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
C-7
Description
Summary
6
6
pin added, note
pin added, note
6
6
6
pin
pin
pin