R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1043

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

23.4.6
(1)
If an error occurs during multi-buffer frame transmission, the processing shown in figure 23.12 is
carried out by the E-DMAC.
In the figure where the transmit descriptor is shown as inactive (TACT bit = 0), buffer data has
already been transmitted successfully, and where the transmit descriptor is shown as active (TACT
bit = 1), buffer data has not been transmitted. If a frame transmit error occurs in the first descriptor
part where the transmit descriptor is active (TACT bit = 1), transmission is halted, and the TACT
bit is cleared to 0, immediately. The next descriptor is then read, and the position within the
transmit frame is determined on the basis of bits TFP1 and TFP0 (continuing [B′00] or end
[B′01]). In the case of a continuing descriptor, the TACT bit is cleared to 0, and the next
descriptor is read immediately. If the descriptor is the final descriptor, not only is the TACT bit
cleared to 0, but write-back is also performed to the TFE and TFS bits at the same time. Data in
the buffer is not transmitted between the occurrence of an error and write-back to the final
descriptor. If error interrupts are enabled in EESIPR, an interrupt is generated immediately after
the final descriptor write-back.
E-DMAC
Multi-Buffer Frame Transmit Processing
Transmit/Receive Processing of Multi-Buffer Frame (Single-Frame/Multi-
Descriptor)
Inacrivates TACT (change 1 to 0)
Descriptor read
Descriptor read
Descriptor read
Descriptor read
Figure 23.12 E-DMAC Operation after Transmit Error
Inactivates TACT
Inactivates TACT
Inactivates TACT
Inactivates TACT
T
A
C
T
0
0
0
1
1
1
1
1
1
D
T
E
L
0
0
0
0
0
0
0
0
1
Descriptors
T
F
P
1
1
0
0
0
0
0
0
0
1
T
F
P
0
0
0
0
0
0
0
0
1
0
Continune
Continune
Continune
Continune
Continune
Continune
Frame
Type
Start
Start
End
Section 23 Gigabit Ethernet Controller (GETHER)
Rev. 2.00 May 22, 2009 Page 973 of 1982
Utransmitted
data is not
transmitted
after error
occurrence.
Descriptor is
only processed
One frame
Transmit error
occurrence
Buffer length set
by descriptor
REJ09B0256-0200
Transmitted data
Untransmitted dara