R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 569

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
1
0
Bit Name
MWPDI
MRDPEI
Initial
Value
0
0
R/W
SH: R/WC
PCI: R
SH: R/WC
PCI: R
Description
Master Write PERR Detection Interrupt
Indicates that the PERR signal has been received
during a master write access (only detected when
PCICMD.PER is set to 1) when the PCIC functions as
a master.
0: Master write PERR interrupt does not occur
[Clear condition]
Write 1 to this bit (write clear).
1: Master write PERR interrupt occurs
[Set condition]
When a master write PERR interrupt occurs.
Master Read Data Parity Error Interrupt
Indicates that a data parity error has been detected
during a master read access (only detected when
PCICMD.PER is set to 1) when the PCIC functions as
a master.
0: Master read data perity error interrupt does not
[Clear condition]
Write 1 to this bit (write clear).
1: Master read data perity error interrupt occurs
[Set condition]
When a master read data perity error interrupt occurs.
occur
Rev. 2.00 May 22, 2009 Page 499 of 1982
Section 13 PCI Controller (PCIC)
REJ09B0256-0200