R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 125

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

2.7
2.7.1
This LSI prefetches instructions more drastically than conventional SH-4 to accelerate the
processing speed. Therefore if the instruction in the memory is modified and it is executed
immediately, then the pre-modified code that is prefetched are likely to be executed. In order to
execute the modified code definitely, one of the following sequences should be executed between
the execution of modifying codes and modified codes.
(1)
(2)
(3)
The all operand cache area corresponding to the modified codes should be written back to the
main memory by the OCBP or OCBWB instruction. Then the all instruction cache area
corresponding to the modified codes should be invalidated by the ICBI instruction. The OCBP,
OCBWB and ICBI instruction should be issued to each cache line. One cache line is 32 bytes.
Note: * Processes executed while changing the instructions on the memory dynamically.
SYNCO
ICBI
The target for the ICBI instruction can be any address within the range where no address error
exception occurs.
SYNCO
ICBI
The all instruction cache area corresponding to the modified codes should be invalidated by the
ICBI instruction. The ICBI instruction should be issued to each cache line. One cache line is 32
bytes.
OCBP @Rm or OCBWB @Rm
SYNCO
ICBI
In case the modified codes are in non-cacheable area
In case the modified codes are in cacheable area (write-through)
In case the modified codes are in cacheable area (copy-back)
Usage Note
Notes on Self-Modified Codes*
@Rn
@Rn
@Rn
Rev. 2.00 May 22, 2009 Page 55 of 1982
Section 2 Programming Model
REJ09B0256-0200