R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 836

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 22 Realtime Clock (RTC)
22.4
22.4.1
R64CNT is an 8-bit read-only register that indicates a state of 64 Hz to 1 Hz within the RTC
frequency divider.
If this register is read when a carry is generated from the 128 kHz frequency division stage, bit 7
(CF) in RTC control register 1 (RCR1) is set to 1, indicating the simultaneous occurrence of the
carry and the 64 Hz counter read. In this case, the read value is not valid, and so R64CNT must be
read again after first writing 0 to the CF bit in RCR1 to clear it.
When the RESET bit or ADJ bit in RTC control register 2 (RCR2) is set to 1, the RTC frequency
divider is initialized and R64CNT is initialized to H'00.
R64CNT is not initialized by a power-on or manual reset.
Bit 7 is always read as 0 and cannot be modified.
22.4.2
RSECCNT is an 8-bit readable/writable register used as a counter for setting and counting the
BCD-coded second value in the RTC. It counts on the carry (transition of the R64CNT.1Hz bit
from 1 to 0) generated once per second by the 64 Hz counter.
The setting range is decimal 00 to 59. The RTC will not operate normally if any other value is set.
Write processing should be performed after stopping the count with the START bit in RCR2, or
by using the carry flag.
RSECCNT is not initialized by a power-on or manual reset.
Bit 7 is always read as 0. A write to this bit is invalid, but the write value should always be 0.
Rev. 2.00 May 22, 2009 Page 766 of 1982
REJ09B0256-0200
Register Descriptions
64 Hz Counter (R64CNT)
Second Counter (RSECCNT)
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
R
R
7
0
7
0
1 Hz
R/W
10-second units
R
6
6
2 Hz
R/W
R
5
5
4 Hz
R/W
R
4
4
8 Hz
R/W
R
3
3
1-second units
16 Hz
R/W
R
2
2
32 Hz
R/W
R
1
1
64 Hz
R/W
R
0
0

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