R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 489

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

12.4.1
Initial value:
Initial value:
Initial value:
Initial value:
Bit
63 to 49 
48
47, 46
Note: * Depends on the setting of external pins (MD5).
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Memory Interface Mode Register (MIM)
Bit Name

BOMODE0
BOMODE1,
R/W
63
47
BOMODE
31
15



R
R
R
0
0
0
R/W
62
46
30
14



R
R
R
0
0
0
LOCK
Initial
Value
All 0
0
All 0
61
45
29
13




R
R
R
R
0
0
0
R/W
R/W
PC
KE
60
44
28
12


R
R
0
0
0
R/W
R
R
R/W
R/W
59
43
27
11



R
R
R
0
0
1
0
R/W
58
42
26
10



R
R
R
0
0
1
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
This bit is always read as 0. The write value should
always be 0.
Access Mode Switch
Switch access modes for the DDR-SDRAM.
The DDRIF supports two DDR-SDRAM access modes.
For details on the operation in each mode, see section
12.5.4, DDR-SDRAM Access Mode.
00: Bank open mode
01: Bank close mode
Other than above: Setting prohibited
DRE
R/W
R/W
57
41
25


R
R
0
0
0
9
0
R/W
END
IAN
*
56
40
24


R
R
R
0
0
0
8
R/W
55
39
23



R
R
R
0
0
0
7
0
Section 12 DDR-SDRAM Interface (DDRIF)
DRI[12:0]
Rev. 2.00 May 22, 2009 Page 419 of 1982
R/W
54
38
22



R
R
R
0
0
0
6
0
R/W
53
37
21



R
R
R
0
0
1
5
0
R/W
52
36
20



R
R
R
0
0
1
4
0
DLLEN
R/W
R/W
51
35
19


R
R
0
0
0
3
0
REJ09B0256-0200
R/W
SEL
50
34
FS
18


R
R
R
0
0
1
2
0
MODE
R/W
R/W
49
33
17


R
R
0
R
0
0
1
0
DCE
R/W
R/W
48
32
16


R
R
0
0
0
0
0