R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 130

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 3 Instruction Set
Rev. 2.00 May 22, 2009 Page 60 of 1982
REJ09B0256-0200
Addressing
Mode
Register
indirect
with pre-
decrement
Register
indirect with
displacement
Indexed
register
indirect
Instruction
Format
@–Rn
@(disp:4, Rn) Effective address is register Rn contents with
@(R0, Rn)
Effective Address Calculation Method
Effective address is register Rn contents,
decremented by a constant beforehand:
1 for a byte operand, 2 for a word operand,
4 for a longword operand, 8 for a quadword
operand.
4-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the operand
size.
Effective address is sum of register Rn and R0
contents.
(zero-extended)
1/2/4/8
1/2/4
Rn
disp
Rn
R0
Rn
Rn – 1/2/4/8
×
–
+
+
Rn + disp × 1/2/4
Rn – 1/2/4/8
Rn + R0
Calculation
Formula
Byte:
Rn – 1 → Rn
Word:
Rn – 2 → Rn
Longword:
Rn – 4 → Rn
Quadword:
Rn – 8 → Rn
Rn → EA
(Instruction
executed
with Rn after
calculation)
Byte: Rn + disp
→ EA
Word: Rn + disp
× 2 → EA
Longword:
Rn + disp × 4 →
EA
Rn + R0 → EA