R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 808

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 20 16-Bit Timer Pulse Unit (TPU)
(2)
Figure 20.10 shows an operation example in which PWM mode has been designated for channel 0,
and buffer operation has been designated for TGRA and TGRC. The settings used in this example
are TCNT clearing by compare match B, 1 output at compare match A (TPU_TO pin), and 0
output at counter clearing. Rewriting timing from the buffer register is set at counter clearing.
As buffer operation has been set, when compare match A occurs the output changes. When
counter clearing occurs by TGRB, the output changes and the value in buffer register TGRC is
simultaneously transferred to timer general register TGRA. This operation is repeated each time
compare match A occurs.
For details of PWM modes, see section 20.4.4, PWM Modes.
Rev. 2.00 May 22, 2009 Page 738 of 1982
REJ09B0256-0200
Example of Buffer Operation
TPU_TO pin
H'0000
TGRC
TGRB
TGRA
TGRA
TCNT value
N (A)
N (A)
Figure 20.10 Example of Buffer Operation
N (A)
N (B)
N (B)
N (TGRB+1)
N (B)
N (TGRB+1)
N (TGRB+1)
Time