R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1118

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 26 I
26.4.5
Figure 26.2 shows a timing chart for the I
each symbol in figure 26.2.
Table 26.5 Description on Symbols of I
Rev. 2.00 May 22, 2009 Page 1048 of 1982
REJ09B0256-0200
Symbol
S
SLA
R/W
A
DATA
P
IIC_SDA
IIC_SCL
I
2
2
C Bus Data Format
C Bus Interface (IIC)
Start condition
S
Description
Indicates a start condition. A master device changes SDA from high to low while
SCL is high level.
Indicates a slave address. A slave address is used when a master device selects
a slave device.
Indicates the direction of data transmission. If the R/W bit is 1, the data flows
from the slave to the master device. If the bit is 0, the data flows from the master
to the slave device.
Indicates data acknowledge. Data receiving device makes SDA low level (the
slave device returns a data acknowledge signal in master transmission mode,
and vice versa).
Indicates transmit or receive data. The data length is eight bits, which are
transferred in the MSB first.
Indicates a stop condition. A master device changes SDA from low to high while
SCL is high.
ADDRESS
1–7
R/W
8
Figure 26.2 I
ACK
9
2
C bus interface. Table 26.5 describes the meaning of
2
C Bus Data Format
1–7
DATA
2
C Bus Timing
8
ACK
9
1–7
DATA
8
ACK
9
Stop condition
P