R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1577

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
6
5
4
Bit Name
EP1 FULL
EP2 TR
EP2
EMPTY
Initial Value
0
0
1
R/W Description
R/W EP2 (Bulk-in) Transfer Request
R
R
[Setting condition]
The FIFO buffer of EP1 has a dual-buffer
configuration, and this bit is set when at least one of
the FIFO buffer is full.
[Setting conditions]
Note: EP1 FULL is a status bit, and cannot be
[Setting condition]
When an IN token is received from the host to EP2
and both of FIFO buffers are empty.
[Clearing conditions]
[Setting conditions]
[Clearing condition]
When both of FIFO buffers are not empty.
Note: EP2 EMPTY is a status bit, and cannot be
EP1 (Bulk-out) FIFO Full
EP2 (Bulk-in) FIFO Empty
When reset
When both FIFO buffers are empty.
When reset
When 0 is written to by CPU
When reset
The FIFO buffer of EP2 has a dual-buffer
configuration, and this bit is set when at least one
of the FIFO buffer is empty.
cleared.
cleared.
Section 36 USB Function Controller (USBF)
Rev. 2.00 May 22, 2009 Page 1507 of 1982
REJ09B0256-0200

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