R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 155

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

(4-9) STC from DBR/GBR/Rp_BANK/SSR/SPC/VBR/SGR: 1 issue cycle
(4-10) STC from SR: 1 issue cycle
(4-11) STC.L from DBR/GBR/Rp_BANK/SSR/SPC/VBR/SGR: 1 issue cycle
(4-12) STC.L from SR: 1 issue cycle
(4-13) LDS to PR: 1 issue cycle
(4-14) LDS.L to PR: 1 issue cycle
(4-15) STS from PR: 1 issue cycle
(4-16) STS.L from PR: 1 issue cycle
(4-17) BSRF, BSR, JSR delay slot instructions (PR set): 0 issue cycle
Notes:
The value of PR is changed in the E3 stage of delay slot instruction.
When the STS and STS.L instructions from PR are used as delay slot instructions,
changed PR value is used.
(I1)
I1
I1
I1
I1
I1
I1
I1
I1
Figure 4.2 Instruction Execution Patterns (5)
(I2)
I2
I2
I2
I2
I2
I2
I2
I2
(ID)
ID
ID
ID
ID
ID
ID
ID
ID
E1S1
E1s1
(??1)
S1
s1
S1
S1
s1
s1
E2S2
E2s2
(??2)
S2
s2
S2
S2
s2
s2
E3S3
E3s3
(??3)
S3
s3
S3
S3
s3
s3
(WB)
WB
WB
WB
WB
Rev. 2.00 May 22, 2009 Page 85 of 1982
WB
WB
WB
WB
Section 4 Pipelining
REJ09B0256-0200