R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 603

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
For PCI memory space 0 accesses, bits 23 to 18 of a SuperHyway bus address are controlled by
PCI memory bank mask register 0 (PCIMBMR0).
Note: In the following items and figures, “SH” means the SuperHyway bus of this LSI and
• PCIMBMR0 [23:18] B'1111 11: PCI address [23:18] = SH address [23:18]
• PCIMBMR0 [23:18] B'0111 11: PCI address [23:18] = PCIMBR0 [23], SH address [22:18]
• PCIMBMR0 [23:18] B'0000 01: PCI address [23:18] = PCIMBR0 [23:19], SH address [18]
• PCIMBMR0 [23:18] B'0000 00: PCI address [23:18] = PCIMBR0 [23:18]
The upper eight bits ([31:24]) of a SuperHyway bus address are replaced with bits 31 to 24 in PCI
memory bank register 0 (PCIMBR0).
For PCI memory space 1 accesses, bits 25 to 18 of a SuperHyway address are controlled by PCI
memory bank mask register 1 (PCIMBMR1).
• PCIMBMR1 [25:18] B'11 1111 11: PCI address [25:18] = SH address [25:18]
• PCIMBMR1 [25:18] B'01 1111 11: PCI address [25:18] = PCIMBR1 [25], SH address [24:18]
• PCIMBMR1 [25:18] B'00 0000 01: PCI address [25:18] = PCIMBR1 [25:19], SH address [18]
• PCIMBMR1 [25:18] B'00 0000 00: PCI address [25:18] = PCIMBR1 [25:18]
The upper six bits ([31:26]) of a SuperHyway bus address are replaced with bits 31 to 26 in PCI
memory bank register 1 (PCIMBR1).
SH address
PCIMBMR0
“PCI” means the PCI local bus.
Figure 13.3 SuperHyway Bus to PCI Local Bus Address Translation
31
31
24 23
24 23
MSBAM0
18 17
18 17
(PCI Memory Space 0)
mask
0
0
PCI address
PCIMBR0
Rev. 2.00 May 22, 2009 Page 533 of 1982
31
31
Section 13 PCI Controller (PCIC)
24 23
24 23
PMSBA0
18 17
18 17
REJ09B0256-0200
0
0

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