AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 100

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

15.3.1
15.3.1.1
15.3.1.2
15.3.1.3
15.3.1.4
15.3.2
15.3.2.1
15.3.2.2
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AT8xC51SND2C/MP3B
Audio DAC Start-up Sequence
Audio PA Sequence
Example of power-on: Path DAC to Headset Output
Example of power-off: Path DAC to Headset Output
Example Start I2S
Example Stop I2S:
PA Power-On Sequence
PA Power-Off Sequence
In order to minimize any audio output noise during the start-up, the following sequence should
be applied.
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To avoid an audible ‘click’ at start-up, the input capacitors have to be pre-charged before the
Power Amplifier.
To avoid an audible ‘click’ at power-off, the gain should be set to the minimum gain (-22dB)
before setting the Power Amplifier.
Desassert the Reset: write 07h at address 10h.
All precharge and Master on: write FFh at address 0Ch.
Line Out On: write 30h at address 00h.
Delay 500 ms.
Precharge off: write 0Ch at address 01h.
Delay 1 ms.
Line Out on, DAC On: write 3Ch at address 00h.
DAC off: write 30h at address 00h.
Master off: write 00h at address 0Ch.
Delay 1 ms.
All off: write 00h at address 00h
Start DCLK.
RSTMASK=1.
RESFILZ=0 and RSTZ=0.
RESFILZ=1 and RSTZ=1.
RSTMASK=0.
Delay 5 ms.
ONDACL=1 and ONDACR=1.
Program all DAC settings: audio format, gains...
DAC off: ONDACL=0 and ONDACR=0.
Stop I2S and DLCK.
4341H–MP3–10/07