AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 118

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

16.10.3
118
AT8xC51SND2C/MP3B
Upstream Resume
The USB controller is then re-activated.
Figure 16-13. Example of a Suspend/Resume Management
A USB device can be allowed by the Host to send an upstream resume for Remote Wake-up
purpose.
When the USB controller receives the SET_FEATURE request: DEVICE_REMOTE_WAKEUP,
the firmware should set to 1 the RMWUPE bit in the USBCON register to enable this functional-
ity. RMWUPE value should be 0 in the other cases.
If the device is in SUSPEND mode, the USB controller can send an upstream resume by clear-
ing first the SPINT bit in the USBINT register and by setting then to 1 the SDRMWUP bit in the
USBCON register. The USB controller sets to 1 the UPRSM bit in the USBCON register. All
clocks must be enabled first. The Remote Wake is sent only if the USB bus was in Suspend
state for at least 5ms. When the upstream resume is completed, the UPRSM bit is reset to 0 by
hardware. The firmware should then clear the SDRMWUP bit.
Detection of a SUSPEND State
Detection of a RESUME State
WUPCPU
SPINT
microcontroller in Power-down
Clear WUPCPU Bit
USB Controller Init
Clear SUSPCLK
Set SUSPCLK
Clear SPINT
Disable PLL
Enable PLL
4341H–MP3–10/07