AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 125

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

4341H–MP3–10/07
Table 16-8.
Reset Value = 1000 0000b
Bit Number
EPEN
1-0
7
7
6
5
4
3
2
EPTYPE1:0
Mnemonic
NAKOUT
NAKIEN
NAKIEN
UEPCONX Register
UEPCONX (S:D4h) –
NAKIN
EPDIR
EPEN
DTGL
Bit
6
Description
Endpoint Enable Bit
Set to enable the endpoint according to the device configuration. Endpoint 0 should
always be enabled after a hardware or USB bus reset and participate in the device
configuration.
Clear to disable the endpoint according to the device configuration.
NAK Interrupt enable
Set this bit to enable NAK IN or NAK OUT interrupt.
Clear this bit to disable NAK IN or NAK OUT Interrupt.
NAK OUT received
This bit is set by hardware when an NAK handshake has been sent in response of a
OUT request from the Host. This triggers a USB interrupt when NAKIEN is set.
This bit should be cleared by software.
NAK IN received
This bit is set by hardware when an NAK handshake has been sent in response of a IN
request from the Host. This triggers a USB interrupt when NAKIEN is set.
This bit should be cleared by software.
Data Toggle Status Bit (Read-only)
Set by hardware when a DATA1 packet is received.
Cleared by hardware when a DATA0 packet is received.
Endpoint Direction Bit
Set to configure IN direction for Bulk, Interrupt and Isochronous endpoints.
Clear to configure OUT direction for Bulk, Interrupt and Isochronous endpoints.
This bit has no effect for Control endpoints.
Endpoint Type Bits
Set this field according to the endpoint configuration (Endpoint 0 should always be
configured as Control):
00
01
10
11
NAKOUT
Control endpoint
Isochronous endpoint
Bulk endpoint
Interrupt endpoint
5
USB Endpoint X Control Register
NAKIN
4
DTGL
AT8xC51SND2C/MP3B
3
EPDIR
2
(X = EPNUM set in UEPNUM)
EPTYPE1
1
EPTYPE0
0
125