AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 47

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

10. Power Management
10.1
10.1.1
4341H–MP3–10/07
Reset
Cold Reset
2 power reduction modes are implemented in the AT8xC51SND2C: the Idle mode and the
Power-down mode. These modes are detailed in the following sections. In addition to these
power reduction modes, the clocks of the core and peripherals can be dynamically divided by 2
using the X2 mode detailed in section “X2 Feature”, page 14.
In order to start-up (cold reset) or to restart (warm reset) properly the microcontroller, an high
level has to be applied on the RST pin. A bad level leads to a wrong initialization of the internal
registers like SFRs, Program Counter… and to unpredictable behavior of the microcontroller. A
proper device reset initializes the AT8xC51SND2C and vectors the CPU to address 0000h. RST
input has a pull-down resistor allowing power-on reset by simply connecting an external capaci-
tor to V
indirectly by an internal reset source such as the watchdog timer. Resistor value and input char-
acteristics are discussed in the Section “DC Characteristics” of the AT8xC51SND2C datasheet.
The status of the Port pins during reset is detailed in
Figure 10-1. Reset Circuitry and Power-On Reset
Table 10-1.
Note:
2 conditions are required before enabling a CPU start-up:
•
•
If one of these 2 conditions are not met, the microcontroller does not start correctly and can exe-
cute an instruction fetch from anywhere in the program space. An active level applied on the
RST pin must be maintained till both of the above conditions are met. A reset is active when the
level V
oscillator are not stabilized. 2 parameters have to be taken into account to determine the reset
pulse width:
•
•
Reset
Idle
Power-down
V
The level on X1 input pin must be outside the specification (V
V
Oscillator startup time.
DD
DD
Mode
DD
IH1
1. Refer to section “Audio Output Interface”, page 74.
RST
must reach the specified V
rise time,
as shown in Figure 10-1. A warm reset can be applied either directly on the RST pin or
is reached and when the pulse width covers the period of time where V
Pin Conditions in Special Operating Modes
Floating
Port 0
RST input circuitry
Data
Data
VDD
VSS
P
Port 1
High
Data
Data
DD
range
Port 2
High
Data
Data
Port 3
Data
Data
High
From Internal
Reset Source
To CPU Core
and Peripherals
AT8xC51SND2C/MP3B
Table
Port 4
10-1.
Data
Data
High
IH
, V
Port 5
High
Data
Data
IL
Power-on Reset
)
VDD
+
Floating
MMC
Data
Data
RST
DD
and the
Audio
Data
Data
1
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