AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 78

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

Figure 14-6. MP3 Mode Audio Configuration Flow
14.8
78
Registers
AT8xC51SND2C/MP3B
Table 14-3.
AUDCON0 (S:9Ah) – Audio Interface Control Register 0
Reset Value = 0000 1000b
Table 14-4.
AUDCON1 (S:9Bh) – Audio Interface Control Register 1
Bit Number
Bit Number
JUST4
SRC
7 - 3
7
2
1
0
7
7
Mnemonic
Mnemonic
JUST4:0
Program Audio Clock
AUDCON0 Register
AUDCON1 Register
DRQEN
JUST3
Configure Interface
JUST4:0 = XXXXXb
DSIZ
SRC
POL
HLR
Configuration
Bit
Bit
6
6
MP3 Mode
DSIZ = X
HLR = X
POL = X
SRC = 0
Description
Audio Stream Justification Bits
Refer to Section "Data Converter", page 75 for bits description.
DSEL Signal Output Polarity
Set to output the left channel on high level of DSEL output (PCM mode).
Clear to output the left channel on the low level of DSEL output (I
Audio Data Size
Set to select 32-bit data output format.
Clear to select 16-bit data output format.
High/Low Rate Bit
Set by software when the PLL clock frequency is 384·Fs.
Clear by software when the PLL clock frequency is 256·Fs.
Description
Audio Source Bit
Set to select C51 as audio source for voice or sound playing.
Clear to select the MP3 decoder output as audio source for song playing.
MSREQ
JUST2
5
5
MUDRN
JUST1
Enable Data Request
Enable DAC System
DAC Set-up Time
4
4
AUDEN = 1
DRQEN = 1
Wait For
Clock
JUST0
3
3
-
DUP1
POL
2
2
DUP0
DSIZ
2
1
S mode).
1
4341H–MP3–10/07
AUDEN
HLR
0
0