AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 167

IC 8051 MCU FLASH 64K MP3 100BGA

AT89C51SND2C-7FTUL

Manufacturer Part Number
AT89C51SND2C-7FTUL
Description
IC 8051 MCU FLASH 64K MP3 100BGA
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51SND2C-7FTUL

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b; D/A 2x20b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
ATAPI, I2S, IDE, SPI, UART, USB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
AT89C51SND2C7FTUL

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Quantity
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4341H–MP3–10/07
Table 19-3.
SPSTA (S:C4h) – SPI Status Register
Reset Value = 00000 0000b
Table 19-4.
SPDAT (S:C5h) – Synchronous Serial Data Register
Reset Value = XXXX XXXXb
Bit Number
Bit Number
SPD7
SPIF
3 - 0
7 - 0
7
7
6
5
4
7
Mnemonic
Mnemonic
SPSTA Register
SPDAT Register
SPD7:0
WCOL
WCOL
MODF
SPD6
SPIF
Bit
Bit
6
6
-
-
Description
SPI Interrupt Flag
Set by hardware when an 8-bit shift is completed.
Cleared by hardware when reading or writing SPDAT after reading SPSTA.
Write Collision Flag
Set by hardware to indicate that a collision has been detected.
Cleared by hardware to indicate that no collision has been detected.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Mode Fault
Set by hardware to indicate that the SS pin is at an appropriate level.
Cleared by hardware to indicate that the SS pin is at an inappropriate level.
Reserved
The value read from these bits is indeterminate. Do not set these bits.
Description
Synchronous Serial Data.
SPD5
5
5
-
MODF
SPD4
4
4
SPD3
AT8xC51SND2C/MP3B
3
3
-
SPD2
2
2
-
SPD1
1
1
-
SPD0
0
0
-
167

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