AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 108

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

108
AT8xC51SND2C/MP3B
•
•
•
Table 16-1.
•
Endpoint Configuration
Disabled
Control
Bulk-in
Bulk-out
Interrupt-In
Interrupt-Out
Isochronous-In
Isochronous-Out
An endpoint which is not enabled won’t answer to any USB request. The Default Control
Endpoint (Endpoint 0) should always be enabled in order to answer to USB standard
requests.
Endpoint type configuration
All Standard Endpoints can be configured in Control, Bulk, Interrupt or Isochronous mode.
The Ping-pong Endpoints can be configured in Bulk, Interrupt or Isochronous mode. The
configuration of an endpoint is performed by setting the field EPTYPE with the following
values:
–
–
–
–
The Endpoint 0 is the Default Control Endpoint and should always be configured in Control
type.
Endpoint direction configuration
For Bulk, Interrupt and Isochronous endpoints, the direction is defined with the EPDIR bit of
the UEPCONX register with the following values:
–
–
For Control endpoints, the EPDIR bit has no effect.
Summary of Endpoint Configuration:
Do not forget to select the correct endpoint number in the UEPNUM register before access-
ing endpoint specific registers.
Endpoint FIFO reset
Before using an endpoint, its FIFO should be reset. This action resets the FIFO pointer to its
original value, resets the Byte counter of the endpoint (UBYCTX register), and resets the
data toggle bit (DTGL bit in UEPCONX).
The reset of an endpoint FIFO is performed by setting to 1 and resetting to 0 the corre-
sponding bit in the UEPRST register.
For example, in order to reset the Endpoint number 2 FIFO, write 0000 0100b then 0000
0000b in the UEPRST register.
Note that the endpoint reset doesn’t reset the bank number for ping-pong endpoints.
Control:
Isochronous: EPTYPE = 01b
Bulk:
Interrupt:
IN:
OUT:
Summary of Endpoint Configuration
EPDIR = 1b
EPDIR = 0b
EPTYPE = 00b
EPTYPE = 10b
EPTYPE = 11b
EPEN
0b
1b
1b
1b
1b
1b
1b
1b
EPDIR
Xb
Xb
1b
0b
1b
0b
1b
0b
EPTYPE
XXb
00b
10b
10b
01b
01b
11b
11b
0XXX XXXb
UEPCONX
4341H–MP3–10/07
80h
86h
82h
87h
83h
85h
81h