AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 81

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

15. DAC and PA Interface
15.1
4341H–MP3–10/07
DAC
The AT8xC51SND2C implements a stereo Audio Digital-to-Analog Converter and Audio Power
Amplifier targeted for Li-Ion or Ni-Mh battery powered devices.
Figure 15-1. Audio Interface Block Diagram
The Stereo DAC section is a complete high performance, stereo, audio digital-to-analog con-
verter delivering 93 dB Dynamic Range. It comprises a multibit sigma-delta modulator with
dither, continuous time analog filters and analog output drive circuitry. This architecture provides
a high insensitivity to clock jitter. The digital interpolation filter increases the sample rate by a
factor of 8 using 3 linear phase half-band filters cascaded, followed by a first order SINC interpo-
lator with a factor of 8. This filter eliminates the images of baseband audio, remaining only the
image at 64x the input sample rate, which is eliminated by the analog post filter. Optionally, a
dither signal can be added that may reduce eventual noise tones at the output. However, the
use of a multibit sigma-delta modulator already provides extremely low noise tones energy.
Master clock is 128 up to 512 times the input data rate allowing choice of input data rate up to 50
kHz, including standard audio rates of 48, 44.1, 32, 16 and 8 kHz. The DAC section is followed
by a volume and mute control and can be simultaneously played back directly through a Stereo
32Ω Headset pair of drivers. The Stereo 32Ω Headset pair of drivers also includes a mixer of a
LINEL and LINER pair of stereo inputs as well as a differential monaural auxiliary input (line
level).
MONOP
MONON
HPP
HPN
PAINP
PAINN
DOUT
AUXP
AUXN
LINEL
LINER
DCLK
SCLK
DSEL
HSR
HSL
Interface
I
2
Decoder
Audio
Audio
S/PCM
Audio
DAC
MP3
Unit
PA
AT8xC51SND2C/MP3B
AUDCDIN
AUDCCS
AUDCDOUT
AUDCCLK
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