AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 228

IC 8051 MCU FLASH 64K MP3 100BGA

AT89C51SND2C-7FTUL

Manufacturer Part Number
AT89C51SND2C-7FTUL
Description
IC 8051 MCU FLASH 64K MP3 100BGA
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51SND2C-7FTUL

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b; D/A 2x20b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
ATAPI, I2S, IDE, SPI, UART, USB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
AT89C51SND2C7FTUL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51SND2C-7FTUL
Manufacturer:
ATMEL
Quantity:
4 371
Part Number:
AT89C51SND2C-7FTUL
Manufacturer:
Atmel
Quantity:
10 000
24.4.1
24.4.1.1
228
AT8xC51SND2C/MP3B
Two-wire Interface
Timings
Table 24-19. TWI Interface AC Timing
V
Notes:
DD
T
T
T
= 2.7 to 3.3 V, T
T
T
T
T
Symbol
SU
SU
SU
SU
HD
SU
HD
T
T
T
T
T
; DAT1
; DAT2
; DAT3
T
T
HIGH
; STO
LOW
; STA
; STA
; DAT
BUF
RC
RD
FC
FD
1. At 100 kbit/s. At other bit-rates this value is inversely proportional to the bit-rate of 100 kbit/s.
2. Determined by the external bus-line capacitance and the external bus-line pull-up resistor, this
3. Spikes on the SDA and SCL lines with a duration of less than 3·T
4. T
must be < 1 µs.
mum capacitance on bus-lines SDA and
SCL= 400 pF.
CLCL
= T
Start condition hold time
SCL low time
SCL high time
SCL rise time
SCL fall time
Data set-up time
SDA set-up time (before repeated START condition)
SDA set-up time (before STOP condition)
Data hold time
Repeated START set-up time
STOP condition set-up time
Bus free time
SDA rise time
SDA fall time
OSC
A
= one oscillator clock period.
= -40 to +85°C
Parameter
14·T
16·T
14·T
14·T
14·T
14·T
INPUT
250 ns
250 ns
250 ns
0.3 µs
0.3 µs
CLCL
Max
1 µs
0 ns
1 µs
Min
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
will be filtered out. Maxi-
(4)
(4)
(4)
(4)
(4)
(4)
20·T
8·T
4341H–MP3–10/07
OUTPUT
8·T
CLCL
4.0 µs
4.7 µs
4.0 µs
0.3 µs
4.7 µs
4.0 µs
4.7 µs
0.3 µs
CLCL
1 µs
Max
Min
-
CLCL
-
(2)
(2)
(4)
(4)
(1)
(1)
(1)
(1)
(3)
(1)
(1)
(1)
(3)
- T
- T
(4)
FC
RD

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