EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 114
EFM32TG210F32
Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Specifications of EFM32TG210F32
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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11.5.13 CMU_IF - Interrupt Flag Register
7
6
5
4
3
2
1
0
31:7
6
5
4
3
2
1
0
Bit
Offset
0x030
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
LFRCORDY
LFRCO is enabled and start-up time has exceeded.
LFRCOENS
LFRCO is enabled.
AUXHFRCORDY
AUXHFRCO is enabled and start-up time has exceeded.
AUXHFRCOENS
AUXHFRCO is enabled.
HFXORDY
HFXO is enabled and start-up time has exceeded.
HFXOENS
HFXO is enabled.
HFRCORDY
HFRCO is enabled and start-up time has exceeded.
HFRCOENS
HFRCO is enabled.
Reserved
CALOF
Set when calibration overflow has occurred
CALRDY
Set when calibration is completed.
AUXHFRCORDY
Set when AUXHFRCO is ready (start-up time exceeded).
LFXORDY
Set when LFXO is ready (start-up time exceeded).
LFRCORDY
Set when LFRCO is ready (start-up time exceeded).
HFXORDY
Set when HFXO is ready (start-up time exceeded).
HFRCORDY
Set when HFRCO is ready (start-up time exceeded).
Name
Name
0
0
0
0
0
0
1
1
0
0
0
0
0
0
1
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Access
Access
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114
Bit Position
LFRCO Ready
LFRCO Enable Status
AUXHFRCO Ready
AUXHFRCO Enable Status
HFXO Ready
HFXO Enable Status
HFRCO Ready
HFRCO Enable Status
Calibration Overflow Interrupt Flag
Calibration Ready Interrupt Flag
AUXHFRCO Ready Interrupt Flag
LFXO Ready Interrupt Flag
LFRCO Ready Interrupt Flag
HFXO Ready Interrupt Flag
HFRCO Ready Interrupt Flag
Description
Description
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