EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 191

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.3.3.3.1 Operation of USn_CS Pin
15.3.3.3.2 AUTOTX
15.3.3.4 Slave Mode
2010-12-21 - d0034_Rev0.90
When there are no more frames in the transmit buffer and the transmit shift register is empty, the clock
stops, and communication ends. When the receiver is enabled, it samples data using the internal clock
when the transmitter transmits data. Operation of the RX and TX buffers is as in asynchronous mode.
When operating in master mode, the USn_CS pin can have one of two functions, or it can be disabled.
If USn_CS is configured as an output, it can be used to automatically generate a chip select for a slave
by setting AUTOCS in USARTn_CTRL. If AUTOCS is set, USn_CS is activated when a transmission
begins, and deactivated directly after the last bit has been transmitted and there is no more data in the
transmit buffer. By default, USn_CS is active low, but its polarity can be inverted by setting CSINV in
USARTn_CTRL.
When USn_CS is configured as an input, it can be used by another master that wants control of the bus
to make the USART release it. When USn_CS is driven low, or high if CSINV is set, the interrupt flag
SSM in USARTn_IF is set, and if CSMA in USARTn_CTRL is set, the USART goes to slave mode.
A synchronous master is required to transmit data to a slave in order to receive data from the slave. In
some cases, only a few words are transmitted and a lot of data is then received from the slave. In that
case, one solution is to keep feeding the TX with data to transmit, but that consumes system bandwidth.
Instead AUTOTX can be used.
When AUTOTX in USARTn_CTRL is set, the USART transmits data as long as there is available space
in the RX shift register for the chosen frame size. This happens even though there is no data in the TX
buffer. The TX underflow interrupt flag TXUF in USARTn_IF is set on the first word that is transmitted
which does not contain valid data.
During AUTOTX the USART will always send the previous sent bit, thus reducing the number of
transitions on the TX output. So if the last bit sent was a 0, 0's will be sent during AUTOTX and if the
last bit sent was a 1, 1's will be sent during AUTOTX.
When the USART is in slave mode, data transmission is not controlled by the USART, but by an external
master. The USART is therefore not able to initiate a transmission, and has no control over the number
of bytes written to the master.
The output and input to the USART are also swapped when in slave mode, making the receiver take its
input from USn_TX (MOSI) and the transmitter drive USn_RX (MISO).
To transmit data when in slave mode, the slave must load data into the transmit buffer and enable the
transmitter. The data will remain in the USART until the master starts a transmission by pulling the
USn_CS input of the slave low and transmitting data. For every frame the master transmits to the slave,
a frame is transferred from the slave to the master. After a transmission, MISO remains in the same
state as the last bit transmitted. This also applies if the master transmits to the slave and the slave TX
buffer is empty.
If the transmitter is enabled in synchronous slave mode and the master starts transmission of a frame,
the underflow interrupt flag TXUF in USARTn_IF will be set if no data is available for transmission to
the master.
If the slave needs to control its own chip select signal, this can be achieved by clearing CSPEN in the
ROUTE register. The internal chip select signal can then be controlled through CSINV in the CTRL
register. The chip select signal will be CSINV inverted, i.e. if CSINV is cleared, the chip select is active
and vice versa.
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