EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 499

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
29.5.5 LCD_STATUS - Status Register
29.5.6 LCD_AREGA - Animation Register A (Async Reg)
2
1
0
31:9
8
7:4
3:0
31:8
Bit
Offset
0x010
Reset
Access
Name
Bit
Offset
0x014
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
For more information about Asynchronous Registers please see Section 5.3 (p. 18) .
AEN
When this bit is set, the animate function is enabled.
BLANK
When this bit is set, all segment output waveforms are configured to blank the LCD display. The Segment Data Registers are not
affected when writing this bit.
BLINKEN
When this bit is set, the Blink function is enabled. Every "ON" segment will alternate between on and off at every Frame Counter Event.
Reserved
BLINK
This bits indicates the blink status. If this bit is 1, all segments are off. If this bit is 0, the segments(LCD_SEGDxn) which are set
to 1 are on.
Reserved
ASTATE
Contains the current animation state (0-15).
Reserved
Name
Name
Name
Value
2
Value
0
1
Mode
SHIFTRIGHT
Description
Display is not "blanked"
Display is "blanked"
0
0
0
0
0x0
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
R
R
Access
Access
Access
Description
Animation Register A is shifted right
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Bit Position
Bit Position
Animation Enable
Blank Display
Blink Enable
Blink State
Current Animation State
Description
Description
Description
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