EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 400

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
24.5.7 ADCn_IF - Interrupt Flag Register
24.5.8 ADCn_IFS - Interrupt Flag Set Register
31:10
9
8
7:2
1
0
31:10
9
8
7:2
1
0
Offset
0x018
Reset
Access
Name
Bit
Offset
0x01C
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
Reserved
SCANOF
Indicates scan result overflow when this bit is set.
SINGLEOF
Indicates single result overflow when this bit is set.
Reserved
SCAN
Indicates scan conversion complete when this bit is set.
SINGLE
Indicates single conversion complete when this bit is set.
Reserved
SCANOF
Write to 1 to set scan result overflow interrupt flag
SINGLEOF
Write to 1 to set single result overflow interrupt flag.
Reserved
SCAN
Write to 1 to set scan conversion complete interrupt flag.
SINGLE
Write to 1 to set single conversion complete interrupt flag.
Name
Name
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
R
R
R
R
W1
W1
W1
W1
Access
Access
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Bit Position
Bit Position
Scan Result Overflow Interrupt Flag
Single Result Overflow Interrupt Flag
Scan Conversion Complete Interrupt Flag
Single Conversion Complete Interrupt Flag
Scan Result Overflow Interrupt Flag Set
Single Result Overflow Interrupt Flag Set
Scan Conversion Complete Interrupt Flag Set
Single Conversion Complete Interrupt Flag Set
Description
Description
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