EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 491

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
29.3.11 LCD Interrupt
29.3.12 Blink, Blank, and Animation Features
29.3.12.1 Blink
29.3.12.2 Blank
29.3.12.3 Animation State Machine
2010-12-21 - d0034_Rev0.90
Figure 29.43. LCD Clock System in LCD Driver
The LCD interrupt can be used to synchronize data update. The FC interrupt flag is set at every LCD
Frame Counter Event, which must be set-up separately. The interrupt is enabled by setting FC bit in
LCD_IEN.
The LCD driver can be configured to blink, alternating all enabled segments between on and off. The blink
frequency is given by the CLK
489) for details regarding synchronization of the blink feature. The FC must be on for blink to work.
Setting BLANK in LCD_BACTRL will output the “OFF” waveform on all enabled segments, effectively
blanking the entire display. Writing the BLANK bit to zero disables the blanking and segment data will
be output as normal. See Section 29.3.8 (p. 489) for details regarding synchronization of blank.
The Animation State Machine makes it possible to enable different animations without updating the data
registers, allowing specialized patterns running on the LCD panel while the microcontroller remains in
Low Energy Mode and thus saving power consumption. The animation feature is available on segment 0
to 7 multiplexed with LCD_COM0. The animation is implemented as two programmable 8 bits registers
that are shifted left or right every other Animation state for a total of 16 states.
The shift operations applied to the shift registers are controlled by AREGASC and AREGBSC in
LCD_BACTRL as shown in the table below. Note also that the FC must be on for animation to work, as
it is the FC event that drives the animation state machine.
CMU
LFRCO
LFXO
LFACLK
div128
div16
div32
div64
CMU_LFAPRESC0
LCD in
EVENT
div12
div16
div2
div4
div6
div8
LFACLK
frequency, see Section 29.3.10 (p. 490) . See Section 29.3.8 (p.
LCDpre
duplex
triplex
quadruplex
sextaplex
octaplex
static
FDIV[ 2:0]
LCD_DISPCTRL
Counter
...the world's most energy friendly microcontrollers
MUX in
491
LFACLK
LCD
div1
div2
div4
div8
LCD_BACTRL
FCPRESC in
CLK
FC
www.energymicro.com
FCTOP[ 5:0]
LCD Fram e
Counter
CLK
CLK
FRAME
EVENT

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