EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 98

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.3.1.5 LFBCLK - Low Frequency B Clock
11.3.1.6 PCNTnCLK - Pulse Counter n Clock
11.3.1.7 WDOGCLK - Watchdog Timer Clock
11.3.1.8 AUXCLK - Auxiliary Clock
11.3.2 Oscillator Selection
11.3.2.1 Start-up Time
11.3.2.2 Switching Clock Source
2010-12-21 - d0034_Rev0.90
LFBCLK is the selected clock for the Low Energy B Peripherals. There are four selectable sources for
LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. In addition, the LFBCLK can be disabled. From
reset, the LFBCLK source is set to LFRCO. However, note that the LFRCO is disabled from reset. The
selection is configured using the LFB field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the
Low Energy B Peripherals to be used as high-frequency peripherals.
Note
Each Low Energy Peripheral that is clocked by LFBCLK has its own prescaler setting and enable bit.
The prescaler settings are configured using CMU_LFBPRESC0 and the clock enable bits can be found
in CMU_LFBCLKEN0.
Each available pulse counter is driven by its own clock, PCNTnCLK where n is the pulse counter instance
number. Each pulse counter can be configured to use an external pin (PCNTn_S0) or LFACLK as
PCNTnCLK.
The Watchdog Timer (WDOG) can be configured to use one of three different clock sources: LFRCO,
LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC Oscillator) is a separate 1 kHz RC oscillator
that also runs in EM3.
AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO. This clock is used for
flash programming, debug trace, and LESENSE operation. During flash programming, or if needed by
LESENSE, this clock will be active. If the AUXHFRCO has not been enabled explicitly by software, the
MSC or LESENSE module will automatically start and stop it. The AUXHFRCO is enabled by writing a
1 to AUXHFRCOEN in CMU_OSCENCMD. This explicit enabling is required when debug trace is used.
The different oscillators have different start-up times. For the RC oscillators, the start-up time is fixed,
but both the LFXO and the HFXO have configurable start-up time. The start-up time is configured by
software and can be optimized for the chosen crystal used in the application.
There are individual bits for each oscillator indicating the status of the oscillator:
• ENABLED - Indicates that the oscillator is enabled
• READY - Start-up time is exceeded
• SELECTED - Start-up time is exceeded and oscillator is chosen as clock source
These status bits are located in the CMU_STATUS register.
The HFRCO oscillator is a low energy oscillator with extremely short wake-up time. Therefore, this
oscillator is always chosen by hardware as the clock source for HFCLK when the device starts up (e.g.
after reset and after waking up from EM2 and EM3). After reset, the HFRCO frequency is 14 MHz.
If HFCORECLK/2 is selected as LFBCLK, the clock will stop in EM2/3.
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