EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 214

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.5.21 USARTn_IRCTRL - IrDA Control Register
8
7
6
5
4
3
2
1
0
31:8
7
6:4
3
Bit
Offset
0x050
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
Enable interrupt on framing error.
PERR
Enable interrupt on parity error (asynchronous mode only).
TXUF
Enable interrupt on TX underflow.
TXOF
Enable interrupt on TX overflow.
RXUF
Enable interrupt on RX underflow.
RXOF
Enable interrupt on RX overflow.
RXFULL
Enable interrupt on RX Buffer full.
RXDATAV
Enable interrupt on RX data.
TXBL
Enable interrupt on TX buffer level.
TXC
Enable interrupt on TX complete.
Reserved
IRPRSEN
Enable the PRS channel selected by IRPRSSEL as input to IrDA module instead of TX.
IRPRSSEL
A PRS can be used as input to the pulse modulator instead of TX. This value selects the channel to use.
IRFILT
Name
Name
Value
0
1
2
3
4
5
6
7
Mode
PRSCH0
PRSCH1
PRSCH2
PRSCH3
PRSCH4
PRSCH5
PRSCH6
PRSCH7
0
0
0
0
0
0
0
0
0
0
0x0
0
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Access
Access
Description
PRS Channel 0 selected
PRS Channel 1 selected
PRS Channel 2 selected
PRS Channel 3 selected
PRS Channel 4 selected
PRS Channel 5 selected
PRS Channel 6 selected
PRS Channel 7 selected
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214
Bit Position
Parity Error Interrupt Enable
TX Underflow Interrupt Enable
TX Overflow Interrupt Enable
RX Underflow Interrupt Enable
RX Overflow Interrupt Enable
RX Buffer Full Interrupt Enable
RX Data Valid Interrupt Enable
TX Buffer Level Interrupt Enable
TX Complete Interrupt Enable
IrDA PRS Channel Enable
IrDA PRS Channel Select
IrDA RX Filter
Description
Description
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