EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 208

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.5.12 USARTn_RXDOUBLEXP - RX Buffer Double Data Extended Peek
Register
15.5.13 USARTn_TXDATAX - TX Buffer Data Extended Register
31
30
29:25
24:16
15
14
13:9
8:0
31:16
15
14
Offset
0x02C
Reset
Access
Name
Bit
Offset
0x030
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
FERRP1
Set if data in buffer has a framing error. Can be the result of a break condition.
PERRP1
Set if data in buffer has a parity error (asynchronous mode only).
Reserved
RXDATAP1
Second frame read from FIFO.
FERRP0
Set if data in buffer has a framing error. Can be the result of a break condition.
PERRP0
Set if data in buffer has a parity error (asynchronous mode only).
Reserved
RXDATAP0
First frame read from FIFO.
Reserved
RXENAT
Set to enable reception after transmission.
TXDISAT
Name
Name
0
0
0x000
0
0
0x000
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
R
R
R
R
R
R
W
W
Access
Access
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208
Bit Position
Bit Position
Data Framing Error 1 Peek
Data Parity Error 1 Peek
RX Data 1 Peek
Data Framing Error 0 Peek
Data Parity Error 0 Peek
RX Data 0 Peek
Enable RX After Transmission
Clear TXEN After Transmission
Description
Description
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