EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 29

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

7.3.1 User Data (UD) Page Description
7.3.2 Lock Bits (LB) Page Description
2010-12-21 - d0034_Rev0.90
Table 7.1. MSC Flash Memory Mapping
1
This is the user data page in the information block. The page can be erased and written by software. The
page is erased by the ERASEPAGE command of the MSC_WRITECMD register. Note that the page is
not erased by a device erase operation. The device erase operation is described in Section 6.4 (p. 23) .
This page contains the following information:
• Main block Page Lock Words (PLWs)
• User data page Lock Word (ULWs)
• Debug Lock Word (DLW)
The words in this page are organized as shown in Table 7.2 (p. 29) :
Table 7.2. Lock Bits Page Structure
There are 32 page lock bits per page lock word (PLW). Bit 0 refers to the first page and bit 31 refers
to the last page within a PLW. Thus, PLW[0] contains lock bits for page 0-31 in the main block, PLW[1]
Block/page erased by a device erase
Block
Main
Reserved
Information
Reserved
127
126
N
…
1
0
1
Page
0
.
63
-
0
-
1
-
2
-
-
Base address
0x00000000
0x00007E00
0x00020000
0x0FE00000
0x0FE00200
0x0FE04000
0x0FE04200
0x0FE08000
0x0FE08200
0x0FE10000
Write/Erase by
Software, debug Yes
Software, debug Yes
Software, debug Yes
-
Software, debug Yes
-
Write: Software,
debug
Erase: Debug
only
-
-
-
-
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29
DLW
ULW
PLW[N]
…
PLW[1]
PLW[0]
Software
readable
-
-
Yes
-
Yes
-
-
Purpose/Name
User code and data
Reserved for flash
expansion
User Data (UD)
Reserved
Lock Bits (LB)
Reserved
Device Information
(DI)
Reserved
Reserved for flash
expansion
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Size
4 KB - 32 KB
~24 MB
2 KB/64 KB
Rest of code
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