EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 43

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8 DMA - DMA Controller
8.1 Introduction
8.2 Features
1
ARM PL230 homepage [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0417a/index.html]
2010-12-21 - d0034_Rev0.90
The Direct Memory Access (DMA) controller performs memory operations independently of the CPU.
This has the benefit of reducing the energy consumption and the workload of the CPU, and enables the
system to stay in low energy modes when moving for instance data from the USART to RAMRAM. The
DMA controller uses the PL230 µDMA controller licensed from ARM
on the EFM32 be connected to any of the EFM32 peripherals.
• The DMA controller is accessible as a memory mapped peripheral
• Possible data transfers include
• The DMA controller has 8 independent channels
• Each channel has one (primary) or two (primary and alternate) descriptors
• The configuration for each channel includes
• The transfer modes include
0 1 2 3
• RAM/Flash to peripheral
• Peripheral to RAM
• RAM/Flash to RAM
• Transfer mode
• Priority
• Word-count
• Word-size (8, 16, 32 bit)
• Basic (using the primary or alternate DMA descriptor)
• Ping-pong (switching between the primary or alternate DMA descriptors, for continuous data flow
to/from peripherals)
controller
4
DMA
Peripherals
Flash
RAM
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43
What?
The DMA controller can move data without
CPU intervention, effectively reducing the
energy consumption for a data transfer.
Why?
The DMA can perform data transfers more
energy efficiently than the CPU and allows
autonomous operation in low energy modes.
The LEUART can for instance provide full
UART communication in EM2, consuming
only a few µA by using the DMA to move data
between the LEUART and RAM.
How?
The DMA controller has multiple highly
configurable, prioritized DMA channels.
Advanced transfer modes such as ping-pong
and scatter-gather make it possible to tailor
the controller to the specific needs of an
application.
1
. Each of the PL230s channels can
Quick Facts
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