EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 254
EFM32TG210F32
Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Specifications of EFM32TG210F32
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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17.3.2.4.1 Frequency Generation (FRG)
17.3.2.5 Pulse-Width Modulation (PWM)
17.3.2.6 Up-count (Single-slope) PWM
2010-12-21 - d0034_Rev0.90
Figure 17.16. TIMER Output Logic
Frequency generation (see Figure 17.17 (p. 254) ) can be achieved in compare mode by:
• Setting the counter in up-count mode
• Enabling buffering of the TOP value.
• Setting the CC channels overflow action to toggle
Figure 17.17. TIMER Up-count Frequency Generation
The output frequency is given by Equation 17.2 (p. 254)
TIMER Up-count Frequency Generation Equation
In PWM mode, TIMERn_CCx_CCV is buffered to avoid glitches in the output. The settings in the
Compare Output Action configuration bits are ignored in PWM mode and PWM generation is only
supported for up-count and up/down-count mode.
If the counter is set to up-count and the Compare/Capture channel is put in PWM mode, single slope
PWM output will be generated (see Figure 17.18 (p. 254) ). In up-count mode the PWM period is TOP
+1 cycles and the PWM output will be high for a number of cycles equal to TIMERn_CCx_CCV. This
means that a constant high output is achieved by setting TIMER_CCx to TOP+1 or higher. The PWM
resolution (in bits) is then given by Equation 17.3 (p. 254) .
Figure 17.18. TIMER Up-count PWM Generation
TIMER Up-count PWM Resolution Equation
Com pare/
PWM x
TIMERn_CCx_CCV
COIST
Output
TIMERn_CCx_CCV
TIMERn_TOP
Com pare m atch
TIMERn_TOP
Buffer update
TIMn_CCx
Overflow
OUTINV
0
0
1
0
f
FRG
TIMn_CCx
= f
HFPERCLK
/ ( 2^(PRESC + 1) x (TOP + 1) )
...the world's most energy friendly microcontrollers
254
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(17.2)
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