EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 412

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19
18:16
15:10
9:8
7
6
5:4
3:2
1
0
Bit
2010-12-21 - d0034_Rev0.90
Reserved
PRESC
Select clock division factor.
Reserved
REFSEL
Select reference.
CH0PRESCRST
Select if prescaler is reset on channel 0 start.
OUTENPRS
Enable PRS Control of DAC output enable.
OUTMODE
Select output mode.
CONVMODE
Configure conversion mode.
SINEMODE
Enable/disable sine mode.
DIFF
Select single ended or differential mode.
Name
Value
3
Value
PRESC
Value
0
1
2
Value
0
1
Value
0
1
Value
0
1
2
3
Value
0
1
2
Value
0
1
Value
0
1
Mode
64CYCLES
Mode
1V25
2V5
VDD
Mode
DISABLE
PIN
ADC
PINADC
Mode
CONTINUOUS
SAMPLEHOLD
SAMPLEOFF
Description
Prescaler not reset on channel 0 start
Prescaler reset on channel 0 start
Description
DAC output enable always on
DAC output enable controlled by PRS signal selected for CH1.
Description
Sine mode disabled. Sine reset to 0 degrees
Sine mode enabled
Description
Single ended output
Differential output
0x0
0x0
0
0
0x1
0x0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
RW
RW
Access
Description
Clock division factor of 2^PRESC.
Description
All channels with enabled refresh are refreshed every 64 prescaled cycles
Description
Internal 1.25 V bandgap reference
Internal 2.5 V bandgap reference
VDD reference
Description
DAC output to pin and ADC disabled
DAC output to pin enabled. DAC output to ADC and ACMP disabled
DAC output to pin disabled. DAC output to ADC and ACMP enabled
DAC output to pin, ADC, and ACMP enabled
Description
DAC is set in continuous mode
DAC is set in sample/hold mode
DAC is set in sample/shut off mode
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412
Prescaler Setting
Reference Selection
Channel 0 Start Reset Prescaler
PRS Controlled Output Enable
Output Mode
Conversion Mode
Sine Mode
Differential Mode
Description
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