EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 335

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
31:23
22
21:20
19
18
17
16
15:14
13
12
11
10
9
8
Offset
0x000
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
Reserved
DEBUGRUN
Set to keep LESENSE running in debug mode.
DMAWU
Reserved
BUFIDL
STRSCANRES
When set, SCANRES will be stored in the result buffer after each scan
BUFOW
If set, LESENSE will always write to the result buffer, even if it is full
Reserved
DUALSAMPLE
When set, both ACMPs will be sampled simultaneously.
Reserved
ALTEXMAP
ACMP1INV
ACMP0INV
Reserved
Name
Value
0
1
Value
0
1
2
Value
0
1
Value
0
1
Mode
DISABLE
BUFDATAV
BUFLEVEL
Mode
HALFFULL
FULL
Mode
ALTEX
ACMP
Description
LESENSE can not start new scans in debug mode
LESENSE can start new scans in debug mode
0
0x0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
RW
RW
RW
Access
Description
No DMA wakeup from EM2
DMA wakeup from EM2 when data is valid in the result buffer
DMA wakeup from EM2 when the result buffer is full/halffull depending on BUFIDL
configuration
Description
DMA and interrupt flags set when result buffer is halffull
DMA and interrupt flags set when result buffer is full
Description
Alternative excitation is mapped to the LES_ALTEX pins.
Alternative excitation is mapped to the pins of the other ACMP.
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335
Bit Position
Debug Mode Run Enable
DMA wakeup from EM2
Result buffer interrupt and DMA trigger level
Enable storing of SCANRES
Result buffer overwrite
Enable dual sample mode
Alternative excitation map
Invert analog comparator 1 output
Invert analog comparator 0 output
Description
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