EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 36

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

7.5.4 MSC_WRITECMD - Write Command Register
1
0
31:6
5
4
3
2
1
0
Bit
Offset
0x00C
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
IRQERASEABORT
When this bit is set to 1, any Cortex-M3 interrupt aborts any current page erase operation. Executing that interrupt vector from Flash
will cause an exception.
WREN
When this bit is set, the MSC write and erase functionality is enabled
Reserved
ERASEABORT
Writing to this bit will abort an ongoing erase sequence.
WRITETRIG
Start write of the first word written to MSC_WDATA, then add 4 to ADDR and write the next word if available within a 30us timeout.
When ADDR is incremented past the page boundary, ADDR is set to the base of the page.
WRITEONCE
Write the word in MSC_WDATA to ADDR. Flash access is returned to the AHB interface as soon as the write operation completes.
The WREN bit in the MSC_WRITECTRL register must be set in order to use this command.
WRITEEND
Write 1 to end write mode when using the WRITETRIG command.
ERASEPAGE
Erase any user defined page selected by the MSC_ADDRB register. The WREN bit in the MSC_WRITECTRL register must be set
in order to use this command.
LADDRIM
Load the internal write address register ADDR from the MSC_ADDRB register. The internal address register ADDR is incremented
automatically by 4 after each word is written. When ADDR is incremented past the page boundary, ADDR is set to the base of the page.
Name
Name
0
0
0
0
0
0
0
0
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
W1
W1
W1
W1
W1
W1
Access
Access
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Bit Position
36
Abort Page Erase on Interrupt
Enable Write/Erase Controller
Abort erase sequence
Word Write Sequence Trigger
Word Write-Once Trigger
End Write Mode
Erase Page
Load MSC_ADDRB into ADDR
Description
Description
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