EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 397

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
24.5.5 ADCn_SCANCTRL - Scan Control Register
2
1
0
31
30:28
27:25
24
23:20
Bit
Offset
0x010
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
ADJ
Select single sample result adjustment.
DIFF
Select single ended or differential input.
REP
Enable/disable repetitive single samples.
Reserved
PRSSEL
Select PRS trigger for scan sequence.
Reserved
PRSEN
Enabled/disable PRS trigger of scan sequence.
AT
Select the acquisition time for scan samples.
Name
Name
Value
0
1
Value
0
1
Value
0
1
Value
0
1
2
3
4
5
6
7
Value
0
1
Mode
RIGHT
LEFT
Mode
PRSCH0
PRSCH1
PRSCH2
PRSCH3
PRSCH4
PRSCH5
PRSCH6
PRSCH7
Description
Single ended input
Differential input
Description
Single conversion mode is deactivated after one conversion
Single conversion mode is converting continuously until SINGLESTOP is written
Description
Scan sequence is not triggered by PRS input
Scan sequence is triggered by PRS input selected by PRSSEL
0
0
0
0x0
0
0x0
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
Access
Access
Description
Results are right adjusted
Results are left adjusted
Description
PRS ch 0 triggers scan sequence
PRS ch 1 triggers scan sequence
PRS ch 2 triggers scan sequence
PRS ch 3 triggers scan sequence
PRS ch 4 triggers scan sequence
PRS ch 5 triggers scan sequence
PRS ch 6 triggers scan sequence
PRS ch 7 triggers scan sequence
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Bit Position
Single Sample Result Adjustment
Single Sample Differential Mode
Single Sample Repetitive Mode
Scan Sequence PRS Trigger Select
Scan Sequence PRS Trigger Enable
Scan Sample Acquisition Time
Description
Description
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