EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 422
EFM32TG210F32
Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Specifications of EFM32TG210F32
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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25.5.17 DACn_OPA1MUX - Operational Amplifier Mux Configuration
Register
3
2:0
31
30:28
27
26
25:24
23:22
Bit
Offset
0x060
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
These bits selects the source for the inverting input on OPA0
Reserved
POSSEL
These bits selects the source for the non-inverting input on OPA0
Reserved
RESSEL
Configures the resistor ladder tap for OPA1.
Reserved
NEXTOUT
Makes output of OPA1 available to OPA2.
Reserved
OUTMODE
Select output channel.
Name
Name
Value
0
1
2
3
Value
0
1
2
3
4
Value
0
1
2
3
4
5
6
7
Mode
DISABLE
UG
OPATAP
NEGPAD
Mode
DISABLE
DAC
POSPAD
OPA0IN
OPATAP
Mode
RES0
RES1
RES2
RES3
RES4
RES5
RES6
RES7
0x0
0x0
0
0x0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
Resistor Value
R2 = 1/3 x R1
R2 = R1
R2 = 1 2/3 x R1
R2 = 2 x R1
R2 = 3 x R1
R2 = 4 1/3 x R1
R2 = 7 x R1
R2 = 15 x R1
Access
Access
Description
Input disabled
Unity Gain feedback path
Feedback resistor
Input from neg pad
Description
Input disabled
DAC as input
POS PAD as input
OPA0 as input
Resistor ladder as input
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422
Bit Position
OPA0 non-inverting Input Mux
OPA1 Resistor Ladder Select
OPA1 Next Enable
Output Select
Description
Description
Inverting Mode Gain (-R2/R1) Non-inverting Mode Gain (1+(R2/
-1/3
-1
-1 2/3
-2 1/5
-3
-4 1/3
-7
-15
www.energymicro.com
R1)
1 1/3
2
2 2/3
3 1/5
4
5 1/3
8
16
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